#define DKIT_DRV_PP_BMP_SHIFT   2
#define DKIT_DRV_CORE_BMP_SHIFT 6

#define DKIT_DRV_CMD_BMP(cmd, bmp) ((cmd) | ((uint64) (bmp) << DRV_BITS_PER_WORD))
#define DKIT_DRV_IO_CORE_BMP(core_id)             ((1 << (core_id)) << DKIT_DRV_CORE_BMP_SHIFT)
#define DKIT_DRV_IO_PP_BMP(core_id, pp_id)        (((1 << (core_id)) << DKIT_DRV_CORE_BMP_SHIFT) | ((1 << (pp_id)) << DKIT_DRV_PP_BMP_SHIFT))
#define DKIT_DRV_IO_DP_BMP(core_id, pp_id, dp_id) (((1 << (core_id)) << DKIT_DRV_CORE_BMP_SHIFT) | ((1 << (pp_id)) << DKIT_DRV_PP_BMP_SHIFT) | (1 << (dp_id)))

#define DKIT_DRV_IOCTL_CORE(lchip, index, core_id, cmd, val)             DRV_IOCTL_BMP(lchip, index, DKIT_DRV_CMD_BMP(cmd, DKIT_DRV_IO_CORE_BMP(core_id)), val)

#define DKIT_DRV_IOW_FIELD_NZ(core_id, pp_id, dp_id, lchip, memid, inst_id, fieldid, value, ptr) \
    do\
    {\
        drv_set_field(lchip, memid, fieldid, ptr, value);\
    }\
    while(0)

#define DKIT_AT_USELESS_ID8   0xff
#define DKIT_AT_USELESS_ID16  0xffff
#define DKIT_AT_USELESS_ID32  0xffffffff

#define DKIT_AT_MCMAC_NUM_PER_CORE 20
enum ctc_at_dkit_subtype_e
{
    CTC_DKIT_AT_SUBTYPE_0,
    CTC_DKIT_AT_SUBTYPE_1,  /* CTC9260 */
    CTC_DKIT_AT_SUBTYPE_2,  /* CTC9262 */
    CTC_DKIT_AT_SUBTYPE_3,  /* CTC9280 */
    CTC_DKIT_AT_SUBTYPE_4,  /* CTC9282 */
    CTC_DKIT_AT_SUBTYPE_5,
    CTC_DKIT_AT_SUBTYPE_6,
    CTC_DKIT_AT_SUBTYPE_7,
    CTC_DKIT_AT_SUBTYPE_8,
    CTC_DKIT_AT_SUBTYPE_9,
    CTC_DKIT_AT_SUBTYPE_MAX
};
typedef enum ctc_at_dkit_subtype_e ctc_at_dkit_subtype_t;

extern int32
ctc_at_dkit_misc_serdes_dump(uint8 lchip, uint16 serdes_id, uint32 dump_level, char* file_name);

extern int32
ctc_at_dkit_misc_serdes_reset(uint8 lchip, uint16 serdes_id);

extern int32
ctc_at_dkit_misc_serdes_ctl(void* p_para);

extern int32
ctc_at_dkit_misc_serdes_diag(uint8 lchip, void* para);

typedef enum {
    DKIT_AT_TXRX_RESET,
    DKIT_AT_GLOBAL_RESET,
    DKIT_AT_PRAM_RESET,
    DKIT_AT_POWER_IVREF,
}_ctc_at_dkit_serdes_reset_type_e;

typedef enum {  
    DKIT_AT_DIR_TX,
    DKIT_AT_DIR_RX
}dkit_at_dir_e;

typedef enum {
    DKIT_AT_LOOPBACK_INTERNAL,
    DKIT_AT_LOOPBACK_EXTERNAL,
    DKIT_AT_LOOPBACK_LOCAL_ANALOG
}_ctc_at_dkit_serdes_loopback_mode_e;

typedef enum 
{
    CTC_DKIT_AT_SERDES_NRZ_MODE,
    CTC_DKIT_AT_SERDES_PAM4_MODE
}_ctc_at_dkit_serdes_modulation_mode_e;

/* Temperature Sensor constants */
#define DKIT_AT112G_TSENE_GAIN           950
#define DKIT_AT112G_TSENE_OFFSET         1180000
#define DKIT_AT56G_TSENE_GAIN          950
#define DKIT_AT56G_TSENE_OFFSET        1180000

/* EOM constants */
#define DKIT_AT56G_EYE_MAX_VOLT_STEPS  64
#define DKIT_AT56G_EYE_MAX_PHASE_LEVEL 2048
/* EOM constants */
#define DKIT_AT112G_EYE_PAM4_VOLT_STEPS  32
#define DKIT_AT112G_EYE_PAM2_VOLT_STEPS  96
#define DKIT_AT112G_EYE_MAX_PHASE_LEVEL  2048

typedef enum 
{
    DKIT_SERDES_SPEED_0G        = 0,          /* serdes_speed = 0,         ock = CTC_CHIP_SERDES_OCS_MODE_NONE */
    DKIT_SERDES_SPEED_1_25G     = 1,          /* serdes_speed = 1250000,   ock = CTC_CHIP_SERDES_OCS_MODE_NONE */
    DKIT_SERDES_SPEED_3_125G    = 2,          /* serdes_speed = 3125000,   ock = CTC_CHIP_SERDES_OCS_MODE_NONE */
    DKIT_SERDES_SPEED_10_3125G  = 3,          /* serdes_speed = 10312500,  ock = CTC_CHIP_SERDES_OCS_MODE_NONE */
    DKIT_SERDES_SPEED_11_40625G = 4,          /* serdes_speed = 11406250,  ock = CTC_CHIP_SERDES_OCS_MODE_11_06G */
    DKIT_SERDES_SPEED_12_5G     = 5,          /* serdes_speed = 12500000,  ock = CTC_CHIP_SERDES_OCS_MODE_12_12G */
    DKIT_SERDES_SPEED_12_96875G = 6,          /* serdes_speed = 12968750,  ock = CTC_CHIP_SERDES_OCS_MODE_12_58G */
    DKIT_SERDES_SPEED_10_9375G  = 7,          /* serdes_speed = 10937500,  ock = CTC_CHIP_SERDES_OCS_MODE_10_6G */
    DKIT_SERDES_SPEED_20_625G   = 8,
    DKIT_SERDES_SPEED_25_78125G = 9,          /* serdes_speed = 25781250,  ock = CTC_CHIP_SERDES_OCS_MODE_NONE */
    DKIT_SERDES_SPEED_28_125G   = 10,         /* serdes_speed = 28125000,  ock = CTC_CHIP_SERDES_OCS_MODE_27_27G */
    DKIT_SERDES_SPEED_26_5625G  = 11,         /* serdes_speed = 26562500,  ock = CTC_CHIP_SERDES_OCS_MODE_26_56G */
    DKIT_SERDES_SPEED_27_34375G = 12,         /* serdes_speed = 27343750,  ock = CTC_CHIP_SERDES_OCS_MODE_26_52G */
    DKIT_SERDES_SPEED_27_78125G = 13,         /* serdes_speed = 27781250,  ock = CTC_CHIP_SERDES_OCS_MODE_26_9G */
    DKIT_SERDES_SPEED_37_5G     = 14,         /* serdes_speed = 37500000,  ock = CTC_CHIP_SERDES_OCS_MODE_36_36G */
    DKIT_SERDES_SPEED_39_0625G  = 15,         /* serdes_speed = 39062500,  ock = CTC_CHIP_SERDES_OCS_MODE_36_76G */
    DKIT_SERDES_SPEED_51_5625G  = 16,         /* serdes_speed = 51562500,  ock = CTC_CHIP_SERDES_OCS_MODE_NONE */
    DKIT_SERDES_SPEED_53_125G   = 17,         /* serdes_speed = 53125000,  ock = CTC_CHIP_SERDES_OCS_MODE_51_56G */
    DKIT_SERDES_SPEED_56_25G    = 18,         /* serdes_speed = 56250000,  ock = CTC_CHIP_SERDES_OCS_MODE_52_71G */
    DKIT_SERDES_SPEED_103_125G  = 19,         /* serdes_speed = 103125000, ock = CTC_CHIP_SERDES_OCS_MODE_NONE */
    DKIT_SERDES_SPEED_106_25G   = 20,         /* serdes_speed = 106250000, ock =  */
    DKIT_SERDES_SPEED_112_5G    = 21,         /* serdes_speed = 112500000, ock =  */
    DKIT_SERDES_SPEED_42_5G     = 22,         /* serdes_speed = 42500000,  ock = CTC_CHIP_SERDES_OCS_MODE_NONE */

    DKIT_SERDES_SPEED_MAX,
}_ctc_at_dkit_serdes_speed_e;
    
typedef enum
{
    AT56G_DATABUS_32BIT       = 0,
    AT56G_DATABUS_40BIT       = 1,
    AT56G_DATABUS_64BIT       = 2,
    AT56G_DATABUS_80BIT       = 3
} _sys_at_serdes_56g_data_width_e;

/* TX and RX Data Bus Width */
typedef enum
{
    AT112G_DATABUS_32BIT        = 0,
    AT112G_DATABUS_40BIT        = 1,
    AT112G_DATABUS_64BIT        = 2,
    AT112G_DATABUS_80BIT        = 3,
    AT112G_DATABUS_128BIT       = 4,
    AT112G_DATABUS_160BIT       = 5,
    AT112G_DATABUSUNSUPPORT     = 6
} _sys_at_serdes_112g_data_width_e;

/* CTLE Parameters */
typedef enum
{
    DKIT_AT56G_CTLE_CUR1_SEL       = 0,
    DKIT_AT56G_CTLE_RL1_SEL        = 1,
    DKIT_AT56G_CTLE_RL1_EXTRA      = 2,
    DKIT_AT56G_CTLE_RES1_SEL       = 3,
    DKIT_AT56G_CTLE_CAP1_SEL       = 4,
    DKIT_AT56G_CTLE_EN_MIDFREQ     = 5,
    DKIT_AT56G_CTLE_CS1_MID        = 6,
    DKIT_AT56G_CTLE_RS1_MID        = 7,
    DKIT_AT56G_CTLE_CUR2_SEL       = 8, 
    DKIT_AT56G_CTLE_RL2_SEL        = 9,
    DKIT_AT56G_CTLE_RL2_TUNE_G     = 10,
    DKIT_AT56G_CTLE_RES2_SEL       = 11,
    DKIT_AT56G_CTLE_CAP2_SEL       = 12,
    DKIT_AT56G_CTLE_CL1_SEL        = 13,
    DKIT_AT56G_CTLE_CL2_SEL        = 14
} _ctc_at_dkit_serdes_56g_ctle_param_e;

struct ctc_at_dkit_serdes_loopback_s
{
   uint8 serdes_id;                     
   uint8 enable;                        
   uint8 mode;                          
};
typedef struct ctc_at_dkit_serdes_loopback_s ctc_at_dkit_serdes_loopback_t;

typedef enum {
    DKIT_AT56G_REFFREQ_25MHZ       = 0,    /* 25 MHz */
    DKIT_AT56G_REFFREQ_30MHZ       = 1,    /* 30 MHz */
    DKIT_AT56G_REFFREQ_40MHZ       = 2,    /* 40 MHz */
    DKIT_AT56G_REFFREQ_50MHZ       = 3,    /* 50 MHz */
    DKIT_AT56G_REFFREQ_62P5MHZ     = 4,    /* 62.5 MHz */
    DKIT_AT56G_REFFREQ_100MHZ      = 5,    /* 100 MHz */
    DKIT_AT56G_REFFREQ_125MHZ      = 6,    /* 125 MHz */
    DKIT_AT56G_REFFREQ_156MHZ      = 7,    /* 156.25 MHz */
    DKIT_AT56G_REFFREQ_122MHZ      = 8,    /* 122.88 MHz */
}_dkit_at_serdes_56g_reffreq_e;

typedef enum
{
    DKIT_AT56G_DATABUS_32BIT       = 0,
    DKIT_AT56G_DATABUS_40BIT       = 1,
    DKIT_AT56G_DATABUS_64BIT       = 2,
    DKIT_AT56G_DATABUS_80BIT       = 3
}_dkit_at_serdes_56g_data_width_e;

/* Reference Clock selection Group */
typedef enum
{
    DKIT_AT56G_REFCLK_SEL_G1       = 0,    /* PIN_REFCLKC_IN_SIDE_A_G1 or PIN_REFCLKC_IN_SIDE_B_G1 */
    DKIT_AT56G_REFCLK_SEL_G2       = 1     /* PIN_REFCLKC_IN_SIDE_A_G2 or PIN_REFCLKC_IN_SIDE_B_G2 */
}_dkit_at_serdes_56g_refclk_e;

typedef enum
{
    DKIT_AT56G_SWAP_DISABLE        = 0,
    DKIT_AT56G_SWAP_PRECODER       = 1,
    DKIT_AT56G_SWAP_POSTCODER      = 2,
    DKIT_AT56G_SWAP_NOT_USED       = 3
}_dkit_at_serdes_56g_swap_msb_lsb_e;

typedef enum
{
    DKIT_AT56G_TXEQ_EM_PRE3        = 0,
    DKIT_AT56G_TXEQ_EM_PRE2        = 1,
    DKIT_AT56G_TXEQ_EM_PRE         = 2,
    DKIT_AT56G_TXEQ_EM_MAIN        = 3,
    DKIT_AT56G_TXEQ_EM_POST        = 4,
    DKIT_AT56G_TXEQ_EM_NA          = 5
} _dkit_at_serdes_56g_txeq_param_e;

/* training log */
typedef enum {
    DKIT_AT56G_TLOG2_CTRL_HOLD     = 0,
    DKIT_AT56G_TLOG2_CTRL_INC      = 1,
    DKIT_AT56G_TLOG2_CTRL_DEC      = 2,
    DKIT_AT56G_TLOG2_CTRL_NA       = 3,    /* RESERVED */
} _dkit_at_serdes_56g_tlog2_ctrl_e;

typedef enum {
    DKIT_AT56G_TLOG2_STS_NO_UPDATE = 0,
    DKIT_AT56G_TLOG2_STS_UPDATE    = 1,
    DKIT_AT56G_TLOG2_STS_MIN       = 2,
    DKIT_AT56G_TLOG2_STS_MAX       = 3,
} _dkit_at_serdes_56g_tlog2_status_e;

typedef enum {
    DKIT_AT56G_TLOG2_PRESET0       = 0,
    DKIT_AT56G_TLOG2_PRESET1       = 1,
    DKIT_AT56G_TLOG2_PRESET_NA     = 2,    /* RESERVED */
} _dkit_at_serdes_56g_tlog2_preset_e;

typedef struct _dkit_at_serdes_56g_tlog2_s
{
    uint8 remoteReqPreset;
    uint8 remoteReqCtrlG1;
    uint8 remoteReqCtrlG0;
    uint8 remoteReqCtrlGN1;
    uint8 remoteReqStsG1;
    uint8 remoteReqStsG0;
    uint8 remoteReqStsGN1;
    uint8 initialize;
    uint8 ready;
    uint8 localReqPreset;
    uint8 localReqCtrlG1;
    uint8 localReqCtrlG0;
    uint8 localReqCtrlGN1;
    uint8 localReqStsG1;
    uint8 localReqStsG0;
    uint8 localReqStsGN1;
} _dkit_at_serdes_56g_tlog2_t;

typedef enum {
    DKIT_AT56G_TLOG4_PRESET0       = 0,    /* Independent COE Control */
    DKIT_AT56G_TLOG4_PRESET1       = 1,    /* No Coefficient */
    DKIT_AT56G_TLOG4_PRESET2       = 2,    /* Pre COE = -15%, Post COE = -10%, Main COE = 75% */
    DKIT_AT56G_TLOG4_PRESET3       = 3,    /* Pre COE = -25%, Post COE = -25%, Main COE = 60% */
} _dkit_at_serdes_56g_tlog4_preset_e;

typedef enum {
    DKIT_AT56G_TLOG4_PAT_PAM2      = 0,
    DKIT_AT56G_TLOG4_PAT_PAM4      = 1,
    DKIT_AT56G_TLOG4_PAT_PAM4_PRE  = 2,    /* PAM4 with Precoding */
    DKIT_AT56G_TLOG4_PAT_NA        = 3,    /* RESERVED */
} _dkit_at_serdes_56g_tlog4_pattern_e;

typedef enum {
    DKIT_AT56G_TLOG4_SEL_COE_N3    = 0,    /* COE(-3) */
    DKIT_AT56G_TLOG4_SEL_COE_N2    = 1,    /* COE(-2) */
    DKIT_AT56G_TLOG4_SEL_COE_N1    = 2,    /* COE(-1) */
    DKIT_AT56G_TLOG4_SEL_COE_P0    = 3,    /* COE(+0) */
    DKIT_AT56G_TLOG4_SEL_COE_P1    = 4,    /* COE(+1) */
    DKIT_AT56G_TLOG4_SEL_NA        = 5,    /* RESERVED */
} _dkit_at_serdes_56g_tlog4_sel_e;

typedef enum {
    DKIT_AT56G_TLOG4_CTRL_HOLD     = 0,
    DKIT_AT56G_TLOG4_CTRL_INC      = 1,
    DKIT_AT56G_TLOG4_CTRL_DEC      = 2,
    DKIT_AT56G_TLOG4_CTRL_NO_EQ    = 3,
} _dkit_at_serdes_56g_tlog4_ctrl_e;

typedef enum {
    DKIT_AT56G_TLOG4_STS_NO_UPDATE = 0,
    DKIT_AT56G_TLOG4_STS_UPDATE    = 1,
    DKIT_AT56G_TLOG4_STS_COE_L     = 2,    /* COE Limit */
    DKIT_AT56G_TLOG4_STS_COE_NA    = 3,    /* COE not support */
    DKIT_AT56G_TLOG4_STS_EQ_L      = 4,    /* EQ Limit */
    DKIT_AT56G_TLOG4_STS_EQ_COE_L  = 5,    /* EQ and COE Limit */
    DKIT_AT56G_TLOG4_STS_NA        = 6,    /* RESERVED */
} _dkit_at_serdes_56g_tlog4_status_e;

typedef struct _dkit_at_serdes_56g_tlog4_s
{
    uint8 remoteReqCtrlPat;
    uint8 remoteReqPreset;
    uint8 remoteReqCtrlG;
    uint8 remoteReqCtrlSel;
    uint8 remoteReqStsG;
    uint8 ready;
    uint8 localReqCtrlPat;
    uint8 localReqPreset;
    uint8 localReqCtrlG;
    uint8 localReqCtrlSel;
    uint8 localReqStsG;
    uint8 stsAck;
} _dkit_at_serdes_56g_tlog4_t;

typedef struct _dkit_at_serdes_56g_tlog_s
{
    uint8 isPAM4;
    _dkit_at_serdes_56g_tlog2_t pam2;
    _dkit_at_serdes_56g_tlog4_t pam4;
} _dkit_at_serdes_56g_tlog_t;


#define DKIT_AT56G_STRING_DASH         "-"
#define DKIT_AT56G_STRING_PRESET_COE   "PRESET_COE"
#define DKIT_AT56G_STRING_NORMAL_OP    "NORMAL_OP"
#define DKIT_AT56G_STRING_INIT_COE     "INIT_COE"
#define DKIT_AT56G_STRING_TRUE         "TRUE"
#define DKIT_AT56G_STRING_FALSE        "FALSE"
#define DKIT_AT56G_STRING_HOLD         "HOLD"
#define DKIT_AT56G_STRING_INC          "INC"
#define DKIT_AT56G_STRING_DEC          "DEC"
#define DKIT_AT56G_STRING_NO_UPDATE    "NO_UPDATE"
#define DKIT_AT56G_STRING_UPDATED      "UPDATED"
#define DKIT_AT56G_STRING_MIN          "MIN"
#define DKIT_AT56G_STRING_MAX          "MAX"
#define DKIT_AT56G_STRING_PRESET0      "PRESET0"
#define DKIT_AT56G_STRING_PRESET1      "PRESET1"
#define DKIT_AT56G_STRING_PRESET2      "PRESET2"
#define DKIT_AT56G_STRING_PRESET3      "PRESET3"
#define DKIT_AT56G_STRING_PAM2         "PAM2"
#define DKIT_AT56G_STRING_PAM4         "PAM4"
#define DKIT_AT56G_STRING_PAM4_PRE     "PAM4_PRE"
#define DKIT_AT56G_STRING_COE_LIMIT    "COE_LIMIT"
#define DKIT_AT56G_STRING_COE_NA       "COE_NA"
#define DKIT_AT56G_STRING_EQ_LIMIT     "EQ_LIMIT"
#define DKIT_AT56G_STRING_EQ_COE_LIMIT "EQ_COE_LIMIT"
#define DKIT_AT56G_STRING_COEN3        "COE(-3)"
#define DKIT_AT56G_STRING_COEN2        "COE(-2)"
#define DKIT_AT56G_STRING_COEN1        "COE(-1)"
#define DKIT_AT56G_STRING_COE0         "COE(0)"
#define DKIT_AT56G_STRING_COE1         "COE(1)"
#define DKIT_AT56G_STRING_NO_EQ        "NO_EQ"

/* DFE Taps */
typedef enum
{
    DKIT_AT56G_DFE_DC              = 0,
    DKIT_AT56G_DFE_DC_E            = 1,
    DKIT_AT56G_DFE_VREF            = 2,
    DKIT_AT56G_DFE_F0              = 3,
    DKIT_AT56G_DFE_F1              = 4,
    DKIT_AT56G_DFE_F1P5            = 5,
    DKIT_AT56G_DFE_F2              = 6,
    DKIT_AT56G_DFE_F3              = 7,
    DKIT_AT56G_DFE_F4              = 8,
    DKIT_AT56G_DFE_F5              = 9,
    DKIT_AT56G_DFE_F6              = 10,
    DKIT_AT56G_DFE_F7              = 11,
    DKIT_AT56G_DFE_F8              = 12,
    DKIT_AT56G_DFE_F9              = 13,
    DKIT_AT56G_DFE_F10             = 14,
    DKIT_AT56G_DFE_F11             = 15,
    DKIT_AT56G_DFE_F12             = 16,
    DKIT_AT56G_DFE_F13             = 17,
    DKIT_AT56G_DFE_F14             = 18,
    DKIT_AT56G_DFE_F15             = 19,
    DKIT_AT56G_DFE_FF0             = 20,
    DKIT_AT56G_DFE_FF1             = 21,
    DKIT_AT56G_DFE_FF2             = 22,
    DKIT_AT56G_DFE_FF3             = 23,
    DKIT_AT56G_DFE_FF4             = 24,
    DKIT_AT56G_DFE_FF5             = 25
} _dkit_at_serdes_56g_dfe_tap_e;

typedef struct _dkit_at_serdes_56g_dfe_tap_param_s
{   
    int32 dkit_dfe_tap_dc   ;
    int32 dkit_dfe_tap_dc_e ;
    int32 dkit_dfe_tap_vref ;
    int32 dkit_dfe_tap_f0   ;
    int32 dkit_dfe_tap_f1   ;
    int32 dkit_dfe_tap_f1p5 ;
    int32 dkit_dfe_tap_f2   ;
    int32 dkit_dfe_tap_f3   ;
    int32 dkit_dfe_tap_f4   ;
    int32 dkit_dfe_tap_f5   ;
    int32 dkit_dfe_tap_f6   ;
    int32 dkit_dfe_tap_f7   ;
    int32 dkit_dfe_tap_f8   ;
    int32 dkit_dfe_tap_f9   ;
    int32 dkit_dfe_tap_f10  ;
    int32 dkit_dfe_tap_f11  ;
    int32 dkit_dfe_tap_f12  ;
    int32 dkit_dfe_tap_f13  ;
    int32 dkit_dfe_tap_f14  ;
    int32 dkit_dfe_tap_f15  ;
    int32 dkit_dfe_tap_ff0  ;
    int32 dkit_dfe_tap_ff1  ;
    int32 dkit_dfe_tap_ff2  ;
    int32 dkit_dfe_tap_ff3  ;
    int32 dkit_dfe_tap_ff4  ;
    int32 dkit_dfe_tap_ff5  ;    
}_dkit_at_serdes_56g_dfe_tap_param_t;

typedef struct _dkit_at_serdes_56g_ctle_param_s
{   
    uint32 dkit_ctle_cur1_sel  ;
    uint32 dkit_ctle_rl1_sel   ;
    uint32 dkit_ctle_rl1_extra ;
    uint32 dkit_ctle_res1_sel  ;
    uint32 dkit_ctle_cap1_sel  ;
    uint32 dkit_ctle_en_midfreq;
    uint32 dkit_ctle_cs1_mid   ;
    uint32 dkit_ctle_rs1_mid   ;
    uint32 dkit_ctle_cur2_sel  ;
    uint32 dkit_ctle_rl2_sel   ;
    uint32 dkit_ctle_rl2_tune_g;
    uint32 dkit_ctle_res2_sel  ;
    uint32 dkit_ctle_cap2_sel  ;
    uint32 dkit_ctle_cl1_sel   ;
    uint32 dkit_ctle_cl2_sel   ;    
}_dkit_at_serdes_56g_ctle_param_t;

/* TX and RX Polarity */
typedef enum
{
    DKIT_AT56G_POLARITY_NORMAL      = 0,
    DKIT_AT56G_POLARITY_INV         = 1
} _dkit_at_serdes_56g_polarity_e;

typedef enum
{
    DKIT_PAT_USER            = 0x0,
    DKIT_PAT_PACKET          = 0x3,
    DKIT_PAT_SSPRQ           = 0x4,
    DKIT_PAT_JITTERK28P5     = 0x8,
    DKIT_PAT_JITTER_1T       = 0x9,
    DKIT_PAT_JITTER_2T       = 0xA,
    DKIT_PAT_JITTER_4T       = 0xB,
    DKIT_PAT_JITTER_5T       = 0xC,
    DKIT_PAT_JITTER_8T       = 0xD,
    DKIT_PAT_JITTER_10T      = 0xE,
    DKIT_PAT_PRBS7           = 0x10,
    DKIT_PAT_PRBS9           = 0x11,
    DKIT_PAT_PRBS11          = 0x12,
    DKIT_PAT_PRBS11_0        = 0x13,
    DKIT_PAT_PRBS11_1        = 0x14,
    DKIT_PAT_PRBS11_2        = 0x15,
    DKIT_PAT_PRBS11_3        = 0x16,
    DKIT_PAT_PRBS15          = 0x17,
    DKIT_PAT_PRBS16          = 0x18,
    DKIT_PAT_PRBS23          = 0x19,
    DKIT_PAT_PRBS31          = 0x1A,
    DKIT_PAT_PRBS32          = 0x1B,
    DKIT_PAT_PRBS13_0        = 0x1C,
    DKIT_PAT_PRBS13_1        = 0x1D,
    DKIT_PAT_PRBS13_2        = 0x1E,
    DKIT_PAT_PRBS13_3        = 0x1F,
} _dkit_at_serdes_prbs_pattern_e;

typedef struct _dkit_at_serdes_56g_eom_margin_s
{
    uint8  eye_tmb;
    uint32 min_samples;
    uint32 ber_thrd;
    uint16 width;
    uint16 height_upper;
    uint16 height_lower;
    uint16 sample_count;
}_dkit_at_serdes_56g_eom_margin_t;

/* SERDES Speeds */
typedef enum
{
    DKIT_AT56G_SERDES_1P0625G      = 0,    /* 1.0625 Gbps*/
    DKIT_AT56G_SERDES_1P2288G      = 1,    /* 1.2288 Gbps */
    DKIT_AT56G_SERDES_1P25G        = 2,    /* 1.25 Gbps */
    DKIT_AT56G_SERDES_2P02752G     = 50,   /* 2.02752 Gbps */
    DKIT_AT56G_SERDES_2P125G       = 3,    /* 2.125 Gbps */
    DKIT_AT56G_SERDES_2P4576G      = 4,    /* 2.4576 Gbps */
    DKIT_AT56G_SERDES_2P5G         = 5,    /* 2.5 Gbps */
    DKIT_AT56G_SERDES_2P57812G     = 46,   /* 2.578125 Gbps */
    DKIT_AT56G_SERDES_3P125G       = 6,    /* 3.125 Gbps */
    DKIT_AT56G_SERDES_4P08804G     = 51,   /* 4.08804 Gbps */
    DKIT_AT56G_SERDES_4P25G        = 7,    /* 4.25 Gbps */
    DKIT_AT56G_SERDES_4P9152G      = 8,    /* 4.9152 Gbps */
    DKIT_AT56G_SERDES_5G           = 9,    /* 5 Gbps */
    DKIT_AT56G_SERDES_5P15625G     = 10,   /* 5.15625 Gbps */
    DKIT_AT56G_SERDES_6P144G       = 11,   /* 6.144 Gbps */
    DKIT_AT56G_SERDES_6P25G        = 12,   /* 6.25 Gbps */
    DKIT_AT56G_SERDES_7P3728G      = 52,   /* 7.3728 Gbps */
    DKIT_AT56G_SERDES_7P5G         = 13,   /* 7.5 Gbps */
    DKIT_AT56G_SERDES_8P11008G     = 53,   /* 8.11008 Gbps */
    DKIT_AT56G_SERDES_8P5G         = 14,   /* 8.5 Gbps*/
    DKIT_AT56G_SERDES_9P8304G      = 15,   /* 9.8304 Gbps */
    DKIT_AT56G_SERDES_10G          = 49,   /* 10 Gbps */
    DKIT_AT56G_SERDES_10P137G      = 16,   /* 10.137 Gbps */
    DKIT_AT56G_SERDES_10P3125G     = 17,   /* 10.3125 Gbps */
    DKIT_AT56G_SERDES_10P5187G     = 18,   /* 10.51875 Gbps */
    DKIT_AT56G_SERDES_12P1651G     = 19,   /* 12.16512 Gbps */
    DKIT_AT56G_SERDES_12P1875G     = 20,   /* 12.1875 Gbps */
    DKIT_AT56G_SERDES_12P5G        = 21,   /* 12.5 Gbps */
    DKIT_AT56G_SERDES_12P8906G     = 22,   /* 12.8906 Gbps */
    DKIT_AT56G_SERDES_14P025G      = 23,   /* 14.025 Gbps */
    DKIT_AT56G_SERDES_14P7456G     = 54,   /* 14.7456 Gbps */
    DKIT_AT56G_SERDES_15G          = 47,   /* 15 Gbps */
    DKIT_AT56G_SERDES_16P2201G     = 55,   /* 16.22016 Gbps */
    DKIT_AT56G_SERDES_20P625G      = 24,   /* 20.625 Gbps */
    DKIT_AT56G_SERDES_24P3302G     = 25,   /* 24.33024 Gbps */
    DKIT_AT56G_SERDES_25P7812G     = 26,   /* 25.78125 Gbps */
    DKIT_AT56G_SERDES_26P5625G     = 27,   /* 26.5625 Gbps */
    DKIT_AT56G_SERDES_275G         = 28,   /* 27.5 Gbps*/
    DKIT_AT56G_SERDES_28P05G       = 29,   /* 28.05 Gbps */
    DKIT_AT56G_SERDES_28P125G      = 30,   /* 28.125 Gbps */
    DKIT_AT56G_SERDES_32G          = 48,   /* 32 Gbps */
    DKIT_AT56G_SERDES_46P25G       = 32,   /* 46.25 Gbps */
    DKIT_AT56G_SERDES_51P5625G     = 34,   /* 51.5625 Gbps */
    DKIT_AT56G_SERDES_53P125G      = 35,   /* 53.125 Gbps */
    DKIT_AT56G_SERDES_56G          = 42,   /* 56 Gbps */
    DKIT_AT56G_SERDES_56P1G        = 37,   /* 56.1 Gbps */
    DKIT_AT56G_SERDES_56P25G       = 38,   /* 56.25 Gbps */
    DKIT_AT56G_SERDES_64G          = 56,   /* 64G (R1.2+ only) */
    DKIT_AT56G_SERDES_3P072G       = 57,   /* 3.072G (R1.2+ only) */
    DKIT_AT56G_SERDES_12P288G      = 58,   /* 12.288G (R1.2+ only) */
    DKIT_AT56G_SERDES_19P6608G     = 59,   /* 19.6608G (R1.2+ only) */
    DKIT_AT56G_SERDES_11P40625G    = 64,   /* 11.40625 Gbps */
    DKIT_AT56G_SERDES_10P9375G     = 65,   /* 10.9375 Gbps */
    DKIT_AT56G_SERDES_12P96875G    = 63,   /* 12.96875 Gbps */
    DKIT_AT56G_SERDES_27P34375G    = 62,   /* 27.34375 Gbps */
    DKIT_AT56G_SERDES_27P78125G    = 61,   /* 27.78125 Gbps */
    
    DKIT_AT56G_SERDES_MAX_G        = 255   /* invalid */
} _dkit_at_serdes_56g_speed_e;

typedef struct _dkit_at_serdes_56g_ffe_tap_s
{
    int32 tap[6];
}_dkit_at_serdes_56g_ffe_tap_t;

#ifdef CTC_MATH_FLOATING
typedef struct _dkit_at_serdes_56g_eye_buffer_s
{
    double bufferData[2][(DKIT_AT56G_EYE_MAX_PHASE_LEVEL * 2) + 1];
}_dkit_at_serdes_56g_eye_buffer_t;
#endif

typedef struct _dkit_at_serdes_56g_eom_data_s
{
    int32 eyeRawData[DKIT_AT56G_EYE_MAX_PHASE_LEVEL][(DKIT_AT56G_EYE_MAX_VOLT_STEPS * 2) - 1];
    uint32 oneUIwidth;
    uint32 upperEdge;
    uint32 lowerEdge;
    uint32 leftEdge;
    uint32 rightEdge;
    uint32 relativeCenter;
    uint32 sampleCount;
    uint32 mv_table[64];
}_dkit_at_serdes_56g_eom_data_t;

static const uint32 DKIT_AT56G_DFE_F0_TABLE[4][4][64] =
{
    {   /* T0 */
        {   /* RES0 */
               80,     260,     440,     570,     740,     920,     970,    1050,
             1120,    1220,    1270,    1320,    1380,    1450,    1510,    1560,
             1630,    1690,    1760,    1840,    1900,    1970,    2050,    2120,
             2200,    2260,    2330,    2410,    2510,    2590,    2660,    2760,
             2840,    2920,    3020,    3100,    3180,    3250,    3350,    3450,
             3530,    3610,    3740,    3810,    3940,    3990,    4100,    4200,
             4300,    4400,    4500,    4580,    4680,    4790,    4910,    5010,
             5120,    5220,    5300,    5400,    5520,    5650,    5710,    5830,
        },
        {   /* RES1 */
               60,     250,     440,     590,     760,     940,    1080,    1200,
             1340,    1500,    1590,    1710,    1810,    1940,    2060,    2180,
             2300,    2450,    2570,    2720,    2840,    2990,    3130,    3300,
             3430,    3580,    3770,    3900,    4050,    4220,    4390,    4560,
             4710,    4890,    5100,    5260,    5450,    5600,    5750,    5970,
             6150,    6320,    6500,    6720,    6890,    7120,    7310,    7470,
             7690,    7840,    8040,    8260,    8460,    8640,    8820,    9040,
             9260,    9460,    9640,    9790,    9990,   10240,   10390,   10570,
        },
        {   /* RES2 */
               60,     250,     440,     590,     780,     980,    1160,    1360,
             1570,    1800,    1960,    2130,    2320,    2490,    2680,    2890,
             3080,    3300,    3530,    3750,    3970,    4180,    4400,    4670,
             4860,    5130,    5370,    5610,    5880,    6150,    6390,    6680,
             6930,    7220,    7440,    7710,    8010,    8260,    8550,    8840,
             9160,    9320,    9660,    9880,   10180,   10500,   10720,   11020,
            11270,   11470,   11750,   11990,   12240,   12430,   12840,   13060,
            13240,   13490,   13750,   14000,   14270,   14570,   14770,   15050,
        },
        {   /* RES3 */
               60,     240,     440,     610,     810,    1020,    1270,    1540,
             1830,    2140,    2380,    2630,    2870,    3120,    3380,    3660,
             3950,    4250,    4540,    4870,    5160,    5520,    5810,    6120,
             6480,    6810,    7110,    7490,    7850,    8220,    8530,    8850,
             9260,    9610,    9970,   10340,   10590,   10950,   11250,   11690,
            11990,   12210,   12630,   12930,   13200,   13550,   13970,   14290,
            14590,   14890,   15120,   15560,   15790,   16110,   16370,   16740,
            16940,   17270,   17570,   17820,   17930,   18260,   18460,   18760,
        }
    },
    {   /* T1 */
        {   /* RES0 */
              699,    1379,    1828,    2158,    2492,    2790,    2919,    3029,
             3178,    3308,    3395,    3480,    3545,    3672,    3735,    3841,
             3926,    4032,    4137,    4200,    4326,    4410,    4493,    4620,
             4704,    4808,    4892,    4997,    5125,    5207,    5334,    5461,
             5521,    5648,    5777,    5837,    6009,    6068,    6195,    6300,
             6407,    6556,    6615,    6744,    6870,    6952,    7080,    7185,
             7312,    7441,    7593,    7650,    7779,    7905,    7988,    8139,
             8244,    8349,    8478,    8581,    8664,    8815,    9012,    9095,
        },
        {   /* RES1 */
              700,    1440,    1930,    2302,    2639,    2999,    3194,    3391,
             3628,    3847,    4002,    4177,    4332,    4487,    4684,    4817,
             5015,    5192,    5369,    5524,    5700,    5877,    6077,    6255,
             6455,    6632,    6809,    7012,    7189,    7433,    7613,    7769,
             7969,    8194,    8372,    8550,    8773,    8954,    9131,    9310,
             9489,    9714,    9963,   10141,   10389,   10544,   10747,   10903,
            11128,   11307,   11462,   11664,   11913,   11998,   12177,   12380,
            12604,   12736,   12915,   13142,   13274,   13523,   13726,   13857,
        },
        {   /* RES2 */
              720,    1520,    2051,    2426,    2806,    3167,    3469,    3774,
             4101,    4451,    4654,    4919,    5143,    5388,    5634,    5881,
             6172,    6442,    6690,    6961,    7188,    7459,    7731,    7981,
             8276,    8593,    8820,    9117,    9413,    9687,    9916,   10191,
            10464,   10807,   11036,   11310,   11516,   11838,   12090,   12387,
            12595,   12847,   13099,   13444,   13650,   13902,   14108,   14477,
            14614,   14959,   15119,   15252,   15693,   15828,   16036,   16288,
            16610,   16864,   17022,   17273,   17503,   17779,   18008,   18188,
        },
        {   /* RES3 */
              739,    1582,    2155,    2570,    2952,    3357,    3745,    4157,
             4615,    5056,    5324,    5639,    5996,    6290,    6627,    6967,
             7351,    7691,    8055,    8376,    8675,    9063,    9404,    9684,
            10051,   10304,   10558,   10812,   11066,   11321,   11575,   11829,
            12084,   12338,   12592,   12845,   13099,   13353,   13608,   13862,
            14115,   14369,   14623,   14877,   15131,   15385,   15639,   15893,
            16147,   16401,   16655,   16909,   17163,   17417,   17671,   17925,
            18178,   18433,   18686,   18940,   19194,   19448,   19702,   19956,
        }
    },
    {   /* T2 */
        {   /* RES0 */
             2674,    4002,    4706,    5161,    5614,    6044,    6173,    6327,
             6505,    6659,    6764,    6892,    6972,    7102,    7205,    7333,
             7436,    7567,    7694,    7751,    7904,    7982,    8112,    8241,
             8369,    8425,    8627,    8681,    8835,    8964,    9067,    9149,
             9301,    9429,    9509,    9638,    9717,    9871,   10023,   10103,
            10207,   10312,   10440,   10569,   10625,   10803,   10956,   11012,
            11116,   11244,   11325,   11526,   11580,   11784,   11763,   11944,
            12095,   12225,   12255,   12433,   12563,   12692,   12796,   12900,
        },
        {   /* RES1 */
             2850,    4279,    5056,    5559,    6039,    6470,    6797,    7052,
             7306,    7560,    7763,    7968,    8073,    8276,    8481,    8683,
             8962,    9141,    9321,    9523,    9677,    9908,   10088,   10266,
            10396,   10672,   10803,   11082,   11261,   11415,   11669,   11872,
            12002,   12230,   12459,   12564,   12818,   13071,   13202,   13404,
            13534,   13663,   13868,   14195,   14373,   14430,   14682,   14813,
            15090,   15221,   15448,   15602,   15806,   15959,   16062,   16269,
            16521,   16550,   16731,   17059,   17138,   17391,   17447,   17675,
        },
        {   /* RES2 */
             3048,    4603,    5431,    5961,    6488,    6918,    7323,    7703,
             8104,    8509,    8690,    8969,    9223,    9424,    9729,   10032,
            10364,   10668,   10996,   11200,   11478,   11832,   12038,   12316,
            12596,   12849,   13178,   13432,   13710,   13913,   14219,   14472,
            14652,   14931,   15183,   15488,   15718,   15996,   16201,   16479,
            16659,   16938,   17217,   17422,   17724,   17953,   18181,   18411,
            18665,   18721,   19123,   19203,   19482,   19660,   19815,   20019,
            20223,   20526,   20656,   20834,   21163,   21318,   21397,   21550,
        },
        {   /* RES3 */
             3224,    4877,    5781,    6312,    6891,    7369,    7821,    8352,
             8831,    9310,    9639,    9968,   10297,   10700,   11030,   11359,
            11913,   12267,   12545,   12951,   13254,   13633,   13961,   14267,
            14568,   14848,   15277,   15581,   15886,   16215,   16494,   16799,
            17077,   17432,   17761,   17990,   18316,   18598,   19025,   19228,
            19583,   19788,   19990,   20221,   20525,   20804,   21058,   21261,
            21516,   21571,   21975,   22326,   22406,   22610,   22965,   23168,
            23322,   23375,   23728,   23911,   24186,   24342,   24248,   24576,
        }
    },
    {   /* T3 */
        {   /* RES0 */
             5700,    7427,    8258,    8761,    9339,    9744,    9923,   10027,
            10182,   10361,   10515,   10592,   10673,   10775,   10979,   10985,
            11289,   11417,   11546,   11676,   11828,   11810,   12013,   12189,
            12245,   12374,   12451,   12631,   12687,   12889,   12969,   12996,
            13225,   13255,   13410,   13539,   13594,   13772,   13852,   13955,
            14158,   14187,   14315,   14520,   14548,   14728,   14757,   14886,
            14965,   15121,   15224,   15377,   15431,   15584,   15640,   15744,
            15921,   16075,   16056,   16235,   16364,   16467,   16620,   16698,
        },
        {   /* RES1 */
             6173,    8003,    8908,    9461,    9942,   10419,   10673,   10928,
            11257,   11462,   11762,   11943,   12073,   12202,   12505,   12709,
            13063,   13340,   13420,   13625,   13904,   14083,   14287,   14416,
            14620,   14849,   15029,   15207,   15436,   15514,   15693,   15924,
            16128,   16280,   16459,   16663,   16893,   17070,   17324,   17456,
            17607,   17837,   17992,   18172,   18375,   18503,   18659,   18837,
            19114,   19194,   19399,   19528,   19583,   19885,   19991,   20093,
            20324,   20576,   20631,   20834,   20988,   21167,   21295,   21400,
        },
        {   /* RES2 */
             6649,    8603,    9532,   10161,   10642,   11096,   11573,   11953,
            12405,   12784,   13064,   13294,   13546,   13827,   14081,   14383,
            14838,   15142,   15345,   15650,   15852,   16158,   16411,   16715,
            16943,   17149,   17429,   17708,   17962,   18140,   18494,   18772,
            18928,   19181,   19410,   19664,   19919,   20147,   20426,   20506,
            20808,   21037,   21217,   21470,   21575,   21805,   22056,   22263,
            22366,   22745,   22899,   23103,   23308,   23536,   23639,   23769,
            24146,   24225,   24357,   24509,   24814,   24816,   25147,   25226,
        },
        {   /* RES3 */
             7049,    9153,   10133,   10736,   11364,   11845,   12324,   12902,
            13407,   13960,   14265,   14667,   14971,   15300,   15581,   16009,
            16364,   16717,   16971,   17374,   17755,   18008,   18212,   18692,
            18995,   19350,   19529,   19907,   20187,   20441,   20745,   21073,
            21276,   21606,   21809,   22089,   22341,   22599,   22926,   23055,
            23458,   23563,   23794,   24045,   24349,   24431,   24780,   24911,
            25142,   25394,   25524,   25650,   25982,   26060,   26414,   26444,
            26672,   26853,   26954,   27233,   27239,   27318,   27672,   27773,
        }
    }
};

typedef enum
{
    DKIT_AT112G_DATABUS_32BIT        = 0,
    DKIT_AT112G_DATABUS_40BIT        = 1,
    DKIT_AT112G_DATABUS_64BIT        = 2,
    DKIT_AT112G_DATABUS_80BIT        = 3,
    DKIT_AT112G_DATABUS_128BIT       = 4,
    DKIT_AT112G_DATABUS_160BIT       = 5,
    DKIT_AT112G_DATABUSUNSUPPORT     = 6
} _dkit_at_serdes_112g_data_width_e;

typedef enum
{
    DKIT_AT112G_SERDES_1P0625G       = 0,    /* 1.0625 Gbps */
    DKIT_AT112G_SERDES_1P2288G       = 1,    /* 1.2288 Gbps */
    DKIT_AT112G_SERDES_1P25G         = 2,    /* 1.25 Gbps */
    DKIT_AT112G_SERDES_2P125G        = 3,    /* 2.125 Gbps */
    DKIT_AT112G_SERDES_2P4576G       = 4,    /* 2.4576 Gbps */
    DKIT_AT112G_SERDES_2P5G          = 5,    /* 2.5 Gbps */
    DKIT_AT112G_SERDES_2P578125G     = 46,   /* 2.578125 Gbps */
    DKIT_AT112G_SERDES_3P125G        = 6,    /* 3.125 Gbps */
    DKIT_AT112G_SERDES_4P25G         = 7,    /* 4.25 Gbps */
    DKIT_AT112G_SERDES_4P9152G       = 8,    /* 4.9152 Gbps */
    DKIT_AT112G_SERDES_5G            = 9,    /* 5 Gbps */
    DKIT_AT112G_SERDES_5P15625G      = 10,   /* 5.15625 Gbps */
    DKIT_AT112G_SERDES_6P144G        = 11,   /* 6.144 Gbps */
    DKIT_AT112G_SERDES_6P25G         = 12,   /* 6.25 Gbps */
    DKIT_AT112G_SERDES_7P5G          = 13,   /* 7.5 Gbps */
    DKIT_AT112G_SERDES_8P5G          = 14,   /* 8.5 Gbps */
    DKIT_AT112G_SERDES_9P8304G       = 15,   /* 9.8304 Gbps */
    DKIT_AT112G_SERDES_10P137G       = 16,   /* 10.137 Gbps */
    DKIT_AT112G_SERDES_10P3125G      = 17,   /* 10.3125 Gbps */
    DKIT_AT112G_SERDES_10P51875G     = 18,   /* 10.51875 Gbps */
    DKIT_AT112G_SERDES_12P16512G     = 19,   /* 12.16512 Gbps */
    DKIT_AT112G_SERDES_12P1875G      = 20,   /* 12.1875 Gbps */
    DKIT_AT112G_SERDES_12P5G         = 21,   /* 12.5 Gbps */
    DKIT_AT112G_SERDES_12P8906G      = 22,   /* 12.8906 Gbps */
    DKIT_AT112G_SERDES_14P025G       = 23,   /* 14.025 Gbps */
    DKIT_AT112G_SERDES_15G           = 47,   /* 15 Gbps */
    DKIT_AT112G_SERDES_20P625G       = 24,   /* 20.625 Gbps */
    DKIT_AT112G_SERDES_24P33024G     = 25,   /* 24.33024 Gbps */
    DKIT_AT112G_SERDES_25P78125G     = 26,   /* 25.78125 Gbps */
    DKIT_AT112G_SERDES_26P5625G      = 27,   /* 26.5625 Gbps */
    DKIT_AT112G_SERDES_27P1875G      = 48,   /* 27.1875 Gbps */
    DKIT_AT112G_SERDES_27P5G         = 28,   /* 27.5 Gbps */
    DKIT_AT112G_SERDES_28P05G        = 29,   /* 28.05 Gbps */
    DKIT_AT112G_SERDES_28P125G       = 30,   /* 28.125 Gbps */
    DKIT_AT112G_SERDES_32P5G         = 31,   /* 32.5 Gbps */
    DKIT_AT112G_SERDES_46P25G        = 32,   /* 46.25 Gbps */
    DKIT_AT112G_SERDES_50G           = 33,   /* 50 Gbps */
    DKIT_AT112G_SERDES_51P5625G      = 34,   /* 51.5625 Gbps */
    DKIT_AT112G_SERDES_53P125G       = 35,   /* 53.125 Gbps */
    DKIT_AT112G_SERDES_56G           = 36,   /* 56 Gbps */
    DKIT_AT112G_SERDES_56P1G         = 37,   /* 56.1 Gbps */
    DKIT_AT112G_SERDES_56P25G        = 38,   /* 56.25 Gbps */
    DKIT_AT112G_SERDES_106GP25G      = 39,   /* 106.25 Gbps */
    DKIT_AT112G_SERDES_112G          = 40,   /* 112 Gbps */
    DKIT_AT112G_SERDES_112P5G        = 41,   /* 112.5 Gbps */
    DKIT_AT112G_SERDES_11P40625G     = 59,   /* 11.40625 Gbps */
    DKIT_AT112G_SERDES_10P9375G      = 58,   /* 10.9375 Gbps */
    DKIT_AT112G_SERDES_12P96875G     = 60,   /* 12.96875 Gbps */
    DKIT_AT112G_SERDES_27P34375G     = 61,   /* 27.34375 Gbps */
    DKIT_AT112G_SERDES_27P78125G     = 62,   /* 27.78125 Gbps */
    DKIT_AT112G_SERDES_MAX_G         = 255   /* invalid */
} _dkit_at_serdes_112g_speed_e;

typedef enum
{
    DKIT_AT112G_SWAP_DISABLE         = 0,
    DKIT_AT112G_SWAP_PRECODER        = 1,
    DKIT_AT112G_SWAP_POSTCODER       = 2,
    DKIT_AT112G_SWAP_NOT_USED        = 3
} _dkit_at_serdes_112g_swap_msb_lsb_e;

typedef enum
{
    DKIT_AT112G_RATE_QUARTER,
    DKIT_AT112G_RATE_HALF,
    DKIT_AT112G_RATE_FULL,
    DKIT_AT112G_RATE_UNKNOWN
} _dkit_at_serdes_112g_data_acq_rate_e;
typedef enum
{
    DKIT_AT112G_TXEQ_EM_PRE3         = 0,
    DKIT_AT112G_TXEQ_EM_PRE2         = 1,
    DKIT_AT112G_TXEQ_EM_PRE          = 2,
    DKIT_AT112G_TXEQ_EM_MAIN         = 3,
    DKIT_AT112G_TXEQ_EM_POST         = 4,
    DKIT_AT112G_TXEQ_EM_POST2        = 5,
} _dkit_at_serdes_112g_ffe_param_e;

/* Training Type */
typedef enum
{
    DKIT_AT_TRAINING_TRX        = 0,
    DKIT_AT_TRAINING_RX         = 1
} _dkit_at_serdes_training_type_e;

/* TX and RX Polarity */
typedef enum
{
    DKIT_AT112G_POLARITY_NORMAL      = 0,
    DKIT_AT112G_POLARITY_INV         = 1
} _dkit_at_serdes_112g_polarity_e;

typedef enum
{
    DKIT_EYE_BOT,    
    DKIT_EYE_MID,
    DKIT_EYE_TOP,
    DKIT_EYE_TMB_BUTT
}_ctc_at_dkit_serdes_eye_tmb_e;

typedef enum
{
    DKIT_AT112G_CTLE_TRAIN_R,
    DKIT_AT112G_CTLE_TRAIN_C,
    DKIT_AT112G_CTLE_TRAIN_GC,
    DKIT_AT112G_CTLE_TRAIN_ATTEN,
} _dkit_at_serdes_112g_ctle_param_e;

typedef struct _dkit_at_serdes_eom_measure_s
{
    int32 phase;
    uint8 voltage;
    uint64 upper_bit_count;
    uint32 upper_bit_error_count;
    uint64 lower_bit_count;
    uint32 lower_bit_error_count;
} _dkit_at_serdes_eom_measure_t;

typedef struct _dkit_at_serdes_112g_ffe_tap_s
{
    int32 tap[6];
}_dkit_at_serdes_112g_ffe_tap_t;

typedef struct _dkit_at_serdes_112g_eom_margin_s
{
    uint8 eye_tmb;
    uint16 width;
    uint16 height_upper;
    uint16 height_lower;
    uint32 min_samples;
    uint32 ber_thrd;
    uint32 sample_count;
}_dkit_at_serdes_112g_eom_margin_t;

typedef struct
{
    uint8 lock;
    uint8 pass;
    uint64 totalBits;
    uint64 totalErrorBits;
}_dkit_at_serdes_pattern_stats_t;

typedef struct _dkit_at_serdes_112g_eom_data_s
{
    int32 eyeRawData[DKIT_AT112G_EYE_MAX_PHASE_LEVEL*2+1][DKIT_AT112G_EYE_PAM2_VOLT_STEPS*2+1];
    uint32 oneUIwidth;
    uint32 upperEdge;
    uint32 lowerEdge;
    uint32 leftEdge;
    uint32 rightEdge;
    uint32 relativeCenter;
    uint32 sampleCount;
    uint32 mv_table[64];
}_dkit_at_serdes_112g_eom_data_t;

#ifdef CTC_MATH_FLOATING
typedef struct _dkit_at_eom_stats_eye_amp_s
{
    double Q;           /* Q factor */
    double SNR;         /* Signal-to-noise ratio */
    double upperMean;   /* Upper mean amplitude */
    double lowerMean;   /* Lower mean amplitude */
    double upperStdDev; /* Upper standard deviation */
    double lowerStdDev; /* Lower standard deviation */
}_dkit_at_eom_stats_eye_amp_t;
#endif

typedef enum
{
    DKIT_AT112G_FFE_PRE_6            = 0,
    DKIT_AT112G_FFE_PRE_5            = 1,
    DKIT_AT112G_FFE_PRE_4            = 2,
    DKIT_AT112G_FFE_PRE_3            = 3,
    DKIT_AT112G_FFE_PRE_2            = 4,
    DKIT_AT112G_FFE_PRE_1            = 5,
    DKIT_AT112G_FFE_PST_1            = 6,
    DKIT_AT112G_FFE_PST_2            = 7,
    DKIT_AT112G_FFE_PST_3            = 8,
    DKIT_AT112G_FFE_PST_4            = 9,
    DKIT_AT112G_FFE_PST_5            = 10,
    DKIT_AT112G_FFE_PST_6            = 11,
    DKIT_AT112G_FFE_PST_7            = 12,
    DKIT_AT112G_FFE_PST_8            = 13,
    DKIT_AT112G_FFE_PST_9            = 14,
    DKIT_AT112G_FFE_PST_10           = 15,
    DKIT_AT112G_FFE_PST_11           = 16,
    DKIT_AT112G_FFE_PST_12           = 17,
    DKIT_AT112G_FFE_PST_13           = 18,
    DKIT_AT112G_FFE_PST_14           = 19,
    DKIT_AT112G_FFE_PST_15           = 20,
    DKIT_AT112G_FFE_PST_16           = 21,
    DKIT_AT112G_FFE_GAIN             = 22,
    DKIT_AT112G_FFE_BLW              = 23,
    DKIT_AT112G_FFE_DFE              = 24
} _dkit_at_serdes_112g_ffe_tap_e;

typedef enum
{
    DKIT_AT112G_DATA_PATH            = 0,
    DKIT_AT112G_CLOCK_PATH           = 1
} E_DKIT_AT112G_FFE_PATH;

typedef enum
{
    DKIT_EOM_PRECISION_L1            = 0,
    DKIT_EOM_PRECISION_L2            = 1,
    DKIT_EOM_PRECISION_L3            = 2,
    DKIT_EOM_PRECISION_L4            = 3,
    DKIT_EOM_PRECISION_L5            = 4,
    DKIT_EOM_PRECISION_BUTT,
} E_DKIT_AT_EOM_PRECISION_LEVEL_E;

typedef struct _dkit_at_serdes_112g_ffe_tap_param_s
{   
    int32 dkit_ffe_tap_pre_6  ;
    int32 dkit_ffe_tap_pre_5  ;
    int32 dkit_ffe_tap_pre_4  ;
    int32 dkit_ffe_tap_pre_3  ;
    int32 dkit_ffe_tap_pre_2  ;
    int32 dkit_ffe_tap_pre_1  ;
    int32 dkit_ffe_tap_pst_1  ;
    int32 dkit_ffe_tap_pst_2  ;
    int32 dkit_ffe_tap_pst_3  ;
    int32 dkit_ffe_tap_pst_4  ;
    int32 dkit_ffe_tap_pst_5  ;
    int32 dkit_ffe_tap_pst_6  ;
    int32 dkit_ffe_tap_pst_7  ;
    int32 dkit_ffe_tap_pst_8  ;
    int32 dkit_ffe_tap_pst_9  ;
    int32 dkit_ffe_tap_pst_10 ;
    int32 dkit_ffe_tap_pst_11 ;
    int32 dkit_ffe_tap_pst_12 ;
    int32 dkit_ffe_tap_pst_13 ;
    int32 dkit_ffe_tap_pst_14 ;
    int32 dkit_ffe_tap_pst_15 ;
    int32 dkit_ffe_tap_pst_16 ;
    int32 dkit_ffe_tap_flt_1  ;
    int32 dkit_ffe_tap_flt_2  ;
    int32 dkit_ffe_tap_flt_3  ;
    int32 dkit_ffe_tap_flt_4  ;
    int32 dkit_ffe_tap_flt_5  ;
    int32 dkit_ffe_tap_flt_6  ;
    int32 dkit_ffe_tap_flt_7  ;
    int32 dkit_ffe_tap_flt_8  ;
    int32 dkit_ffe_tap_gain   ;
    int32 dkit_ffe_tap_blw    ;
    int32 dkit_ffe_tap_dfe    ;
}_dkit_at_serdes_112g_ffe_tap_param_t;

typedef struct _dkit_at_serdes_112g_ctle_param_s
{   
    uint32 dkit_ctle_r;
    uint32 dkit_ctle_c;
    uint32 dkit_ctle_gc;
    uint32 dkit_ctle_atten;
}_dkit_at_serdes_112g_ctle_param_t;

#define PRBS_VALUE_TO_PATTERN(p_prbs_value, p_pattern) do{\
    switch(p_prbs_value)\
    {\
        case DKIT_PAT_PRBS7:\
            p_pattern = 0;\
            break;\
        case DKIT_PAT_PRBS15:\
            p_pattern = 2;\
            break;\
        case DKIT_PAT_PRBS23:\
            p_pattern = 4;\
            break;\
        case DKIT_PAT_PRBS31:\
            p_pattern = 6;\
            break;\
        case DKIT_PAT_PRBS9:\
            p_pattern = 8;\
            break;\
        case DKIT_PAT_PRBS11:\
            p_pattern = 10;\
            break;\
        case DKIT_PAT_PRBS13_0:\
        case DKIT_PAT_PRBS13_1:\
        case DKIT_PAT_PRBS13_2:\
        case DKIT_PAT_PRBS13_3:\
            p_pattern = 12;\
            break;\
        default:\
            p_pattern = 255;\
            break;\
            break;\
    }\
}while(0)

#define PRBS_PATTERN_TO_VALUE(p_pattern, p_prbs_value) do{\
    switch(p_pattern)\
    {\
        case 0:\
        case 1:\
            p_prbs_value = DKIT_PAT_PRBS7;\
            break;\
        case 2:\
        case 3:\
        case 15:\
        case 19:\
            p_prbs_value = DKIT_PAT_PRBS15;\
            break;\
        case 4:\
        case 5:\
            p_prbs_value = DKIT_PAT_PRBS23;\
            break;\
        case 6:\
        case 7:\
        case 16:\
        case 20:\
            p_prbs_value = DKIT_PAT_PRBS31;\
            break;\
        case 8:\
        case 13:\
        case 17:\
            p_prbs_value = DKIT_PAT_PRBS9;\
            break;\
        case 12:\
        case 14:\
        case 18:\
            p_prbs_value = DKIT_PAT_PRBS13_0;\
            break;\
        case 10:\
            p_prbs_value = DKIT_PAT_PRBS11;\
            break;\
        case 9:\
            p_prbs_value = DKIT_PAT_JITTER_8T;\
            break;\
        default:\
            return;\
    }\
}while(0)



int32 ctc_at_dkit_misc_read_serdes(void* para);
int32 ctc_at_dkit_misc_write_serdes(void* para);

